发明授权
US07615458B2 Activation of CMOS source/drain extensions by ultra-high temperature anneals 有权
通过超高温退火激活CMOS源极/漏极延伸

Activation of CMOS source/drain extensions by ultra-high temperature anneals
摘要:
A method of manufacturing a semiconductor device that includes forming a gate dielectric layer over a semiconductor substrate. A gate electrode is formed over the gate dielectric layer. A dopant is implanted into an extension region of the substrate, with an amount of the dopant remaining in a dielectric layer adjacent the gate electrode. The substrate is annealed at a temperature of about 1000° C. or greater to cause at least a portion of the amount of the dopant to diffuse into the semiconductor substrate.
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