发明授权
US07619550B2 Delta-sigma AD converter apparatus using delta-sigma modulator circuit provided with reset circuit resetting integrator
失效
采用Δ-Σ调制器电路的Delta-sigma AD转换器装置设有复位电路复位积分器
- 专利标题： Delta-sigma AD converter apparatus using delta-sigma modulator circuit provided with reset circuit resetting integrator
- 专利标题（中）： 采用Δ-Σ调制器电路的Delta-sigma AD转换器装置设有复位电路复位积分器
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申请号： US12100236申请日： 2008-04-09
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公开(公告)号： US07619550B2公开(公告)日： 2009-11-17
- 发明人: Tomoaki Maeda , Taiji Akizuki , Hisashi Adachi
- 申请人： Tomoaki Maeda , Taiji Akizuki , Hisashi Adachi
- 申请人地址： JP Osaka
- 专利权人： Panasonic Corporation
- 当前专利权人： Panasonic Corporation
- 当前专利权人地址： JP Osaka
- 代理机构： Wenderoth, Lind & Ponack, L.L.P.
- 优先权： JP2007-102454 20070410
- 主分类号： H03M3/00
- IPC分类号： H03M3/00
摘要：
In a delta-sigma modulator circuit, an integrator integrates an input signal, and a quantization circuit quantizes the integrated signal with a predetermined quantization number, and outputs a quantization result signal. A DA converter circuit outputs an analog signal indicating a DA conversion result based on the quantization result signal. An oscillation detector circuit detects that the integrator is in an oscillation state based on the integrated signal, and outputting an oscillation detection signal. A reset circuit resets the integrator based on the oscillation detection signal.
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