Invention Grant
- Patent Title: Semiconductor device having shallow trench isolation structure comprising an upper trench and a lower trench including a void
- Patent Title (中): 具有浅沟槽隔离结构的半导体器件包括上沟槽和包括空隙的下沟槽
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Application No.: US11383141Application Date: 2006-05-12
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Publication No.: US07622778B2Publication Date: 2009-11-24
- Inventor: Sung-Sam Lee , Gyo-Young Jin , Yun-Gi Kim
- Applicant: Sung-Sam Lee , Gyo-Young Jin , Yun-Gi Kim
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronic Co., Ltd.
- Current Assignee: Samsung Electronic Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Marger Johnson & McCollom, P.C.
- Priority: KR10-2005-0041761 20050518
- Main IPC: H01L23/62
- IPC: H01L23/62

Abstract:
In one embodiment, a semiconductor device has an active region defined by an isolation layer formed inside an STI trench that includes an upper trench and a lower trench having a substantially curved cross-sectional profile under the upper trench so that the lower trench is in communication with the upper trench. Since the upper trench has a sidewall tapered with a positive slope, a good gap filling property can be obtained when filling the upper trench with an insulating layer. By forming a void in the lower trench, a dielectric constant at the bottom of the isolation layer is lower than a dielectric constant at an oxide layer, thereby improving the isolation property. The isolation layer includes a first insulating layer formed inside only the upper trench and covering an inner wall of the upper trench in the form of a spacer.
Public/Granted literature
- US20060263991A1 SEMICONDUCTOR DEVICE HAVING SHALLOW TRENCH ISOLATION STRUCTURE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2006-11-23
Information query
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