Method of making a transistor with a sloped drain diffusion layer

Invention Grant

US07629214B2 Method of making a transistor with a sloped drain diffusion layer 有权

Title translation: 制造具有倾斜漏极扩散层的晶体管的方法

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Patent Title: Method of making a transistor with a sloped drain diffusion layer
Patent Title (中): 制造具有倾斜漏极扩散层的晶体管的方法
Application No.: US11392779

Application Date: 2006-03-28
Publication No.: US07629214B2

Publication Date: 2009-12-08
Inventor: Seiji Otake , Shuichi Kikuchi
Applicant: Seiji Otake , Shuichi Kikuchi
Applicant Address: JP Osaka
Assignee: Sanyo Electric Co., Ltd.
Current Assignee: Sanyo Electric Co., Ltd.
Current Assignee Address: JP Osaka
Agency: Fish & Richardson P.C.
Priority: JPP2005-098968 20050330
Main IPC: H01L21/8244
IPC: H01L21/8244

Method of making a transistor with a sloped drain diffusion layer

Abstract:

Disclosed is that in a method of manufacturing a semiconductor device of the present invention, when first and second P type diffusion layers using as a backgate region, these layers are formed in such a way that their impurity concentration peaks are shifted, respectively. Then, in the backgate region, a concentration profile of a region where an N type diffusion layer is formed is gradually established. After that, impurity ions, which form the N type diffusion layer, are implanted, and thereafter a thermal treatment is performed to diffuse the N type diffusion layer in a y shape at a lower portion of a gate electrode. This manufacturing method makes it possible to implement an electric filed relaxation in a drain region.

Abstract(Chinese):

公开了在本发明的半导体器件的制造方法中，当使用作为背栅区域的第一和第二P型扩散层时，这些层分别以其杂质浓度峰偏移的方式形成。然后，在背栅区域逐渐建立形成有N型扩散层的区域的浓度分布。之后，注入形成N型扩散层的杂质离子，然后进行热处理，以使n型扩散层在栅电极的下部以y形扩散。这种制造方法使得可以在漏极区域中实现电场弛豫。

Public/Granted literature

US20060223259A1 Method of manufacturing semiconductor device Public/Granted day:2006-10-05

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8239	........存储器结构
H01L21/8244	.........静态随机存取存储结构（SRAM）