Invention Grant
US07632727B2 Method of forming stepped recesses for embedded strain elements in a semiconductor device
有权
在半导体器件中形成用于嵌入式应变元件的阶梯式凹陷的方法
- Patent Title: Method of forming stepped recesses for embedded strain elements in a semiconductor device
- Patent Title (中): 在半导体器件中形成用于嵌入式应变元件的阶梯式凹陷的方法
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Application No.: US12119384Application Date: 2008-05-12
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Publication No.: US07632727B2Publication Date: 2009-12-15
- Inventor: Rohit Pal , Frank Bin Yang , Michael Hargrove
- Applicant: Rohit Pal , Frank Bin Yang , Michael Hargrove
- Applicant Address: KY Grand Caymen
- Assignee: GlobalFoundries Inc.
- Current Assignee: GlobalFoundries Inc.
- Current Assignee Address: KY Grand Caymen
- Agency: Ingrassia, Fisher & Lorenz, P.C.
- Main IPC: H01L29/772
- IPC: H01L29/772

Abstract:
A method of fabricating a semiconductor transistor device is provided. The fabrication method begins by forming a gate structure overlying a layer of semiconductor material, such as silicon. Then, spacers are formed about the sidewalls of the gate structure. Next, ions of an amorphizing species are implanted into the semiconductor material at a tilted angle toward the gate structure. The gate structure and the spacers are used as an ion implantation mask during this step. The ions form amorphized regions in the semiconductor material. Thereafter, the amorphized regions are selectively removed, resulting in corresponding recesses in the semiconductor material. In addition, the recesses are filled with stress inducing semiconductor material, and fabrication of the semiconductor transistor device is completed.
Public/Granted literature
- US20090280627A1 METHOD OF FORMING STEPPED RECESSES FOR EMBEDDED STRAIN ELEMENTS IN A SEMICONDUCTOR DEVICE Public/Granted day:2009-11-12
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