Invention Grant
- Patent Title: I/O translation lookaside buffer performance
- Patent Title (中): I / O翻译后备缓冲区性能
-
Application No.: US11588900Application Date: 2006-10-26
-
Publication No.: US07636832B2Publication Date: 2009-12-22
- Inventor: Ashok Raj , Rajesh Shah
- Applicant: Ashok Raj , Rajesh Shah
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Caven & Aghevli LLC
- Main IPC: G06F12/10
- IPC: G06F12/10

Abstract:
Methods and apparatus to provide improved input/output (I/O) address translation lookaside buffer performance are described. In one embodiment, one or more entries of a cache (e.g., an I/O address translation lookaside buffer) are locked in response to a request to lock the one or more entries. Other embodiments are also described.
Public/Granted literature
- US20080104363A1 I/O translation lookaside buffer performance Public/Granted day:2008-05-01
Information query