发明授权
- 专利标题: Semiconductor and semiconductor manufacturing arrangements having a chalcogenide layer formed of columnar crystal grains perpendicular to a main substrate surface
- 专利标题(中): 具有由垂直于主衬底表面的柱状晶粒形成的硫族化物层的半导体和半导体制造布置
-
申请号: US11272811申请日: 2005-11-15
-
公开(公告)号: US07638786B2公开(公告)日: 2009-12-29
- 发明人: Yuichi Matsui , Motoyasu Terao , Norikatsu Takaura , Takahiro Morikawa , Naoki Yamamoto
- 申请人: Yuichi Matsui , Motoyasu Terao , Norikatsu Takaura , Takahiro Morikawa , Naoki Yamamoto
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corp.
- 当前专利权人: Renesas Technology Corp.
- 当前专利权人地址: JP Tokyo
- 代理机构: Antonelli, Terry, Stout & Kraus, LLP.
- 优先权: JP2004-330537 20041115; JP2005-010199 20050118
- 主分类号: H01L29/02
- IPC分类号: H01L29/02
摘要:
The annealing process at 400° C. or more required for the wiring process for a phase change memory has posed the problem in that the crystal grains in a chalcogenide material grow in an oblique direction to cause voids in a storage layer. The voids, in turn, cause peeling due to a decrease in adhesion, variations in resistance due to improper contact with a plug, and other undesirable events. After the chalcogenide material has been formed in an amorphous phase, post-annealing is conducted to form a (111)-oriented and columnarly structured face-centered cubic. This is further followed by high-temperature annealing to form a columnar, hexagonal closest-packed crystal. Use of this procedure makes it possible to suppress the growth of inclined crystal grains that causes voids, since crystal grains are formed in a direction perpendicular to the surface of an associated substrate.
公开/授权文献
信息查询
IPC分类: