发明授权
- 专利标题： MOS devices with reduced recess on substrate surface
- 专利标题（中）： 在衬底表面上减少凹槽的MOS器件
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申请号： US11320012申请日： 2005-12-27
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公开(公告)号： US07642607B2公开(公告)日： 2010-01-05
- 发明人: Chih-Hao Wang , Ta-Wei Wang
- 申请人： Chih-Hao Wang , Ta-Wei Wang
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L29/78
- IPC分类号： H01L29/78
摘要：
A MOS device having reduced recesses under a gate spacer and a method for forming the same are provided. The MOS device includes a gate structure overlying the substrate, a sidewall spacer on a sidewall of the gate structure, a recessed region having a recess depth of substantially less than about 30 Å underlying the sidewall spacer, and a silicon alloy region having at least a portion in the substrate and adjacent the recessed region. The silicon alloy region has a thickness of substantially greater than about 30 nm. A shallow recess region is achieved by protecting the substrate when a hard mask on the gate structure is removed. The MOS device is preferably a pMOS device.
公开/授权文献
- US20070034906A1 MOS devices with reduced recess on substrate surface 公开/授权日：2007-02-15
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