发明授权
- 专利标题: Method for manufacturing semiconductor integrated circuit device
- 专利标题(中): 半导体集成电路器件的制造方法
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申请号: US11738741申请日: 2007-04-23
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公开(公告)号: US07655993B2公开(公告)日: 2010-02-02
- 发明人: Ryoichi Furukawa , Satoshi Sakai , Satoshi Yamamoto
- 申请人: Ryoichi Furukawa , Satoshi Sakai , Satoshi Yamamoto
- 申请人地址: JP Tokyo
- 专利权人: Renesas Technology Corporation
- 当前专利权人: Renesas Technology Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Antonelli, Terry, Stout & Kraus, LLP.
- 优先权: JP2001-350636 20011115
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating film is suppressed. A gate insulating film of MISFETs constituting an internal circuit is comprised of a silicon oxynitride film. Another gate insulating film of MISFETs constituting an I/O circuit is comprised of a laminated silicon oxynitride film and a high dielectric film. A process of forming the two types of gate insulating films on the substrate is continuously carried out in a treatment apparatus of a multi-chamber system. Accordingly, the substrate will not be exposed to air. Therefore, it is possible to suppress the inclusion of undesirable foreign matter and the formation of a natural oxide film at the interface between the substrate and the gate insulating films.