Invention Grant
- Patent Title: Dual gate CMOS fabrication
- Patent Title (中): 双栅CMOS制造
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Application No.: US11573346Application Date: 2005-08-01
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Publication No.: US07659154B2Publication Date: 2010-02-09
- Inventor: Markus Muller , Peter Stolk
- Applicant: Markus Muller , Peter Stolk
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP04300538 20040813
- International Application: PCT/IB2005/052569 WO 20050801
- International Announcement: WO2006/018762 WO 20060223
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/44

Abstract:
The invention relates to a method of fabricating a CMOS device, comprising providing a semiconductor substrate (101) having therein a layer of insulating material (102), the method comprising providing a layer (106) of a first material over the insulating layer (102), the thickness of the layer (106) of the first material being less in a first region (103) for supporting a first active device than in a second region (104) for supporting a second active device. A layer (107) of a second material is then deposited over the layer (106) of a first material, and the structure is then subjected to a thermal treatment to alloy the first and second materials. The portion of the layers over the first region is entirely alloyed, whereas the portion of the layers over the second region is not, so that a portion (109) of the layer (106) of the first material remains.
Public/Granted literature
- US20080169511A1 Dual Gate Cmos Fabrication Public/Granted day:2008-07-17
Information query
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