发明授权
- 专利标题： In-situ deposition for Cu hillock suppression
- 专利标题（中）： Cu小丘抑制的原位沉积
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申请号： US12186936申请日： 2008-08-06
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公开(公告)号： US07659198B2公开(公告)日： 2010-02-09
- 发明人: Chung-Hsien Chen , Chun-Chieh Lin , Minghsing Tsai , Shau-Lin Shue
- 申请人： Chung-Hsien Chen , Chun-Chieh Lin , Minghsing Tsai , Shau-Lin Shue
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L21/44
- IPC分类号： H01L21/44
摘要：
A semiconductor interconnect structure having reduced hillock formation and a method for forming the same are provided. The semiconductor interconnect structure includes a conductor formed in a dielectric layer. The conductor includes at least three sub-layers, wherein the ratio of the impurity concentrations in neighboring sub-layers is preferably greater than about two.
公开/授权文献
- US20090035937A1 In-Situ Deposition for Cu Hillock Suppression 公开/授权日：2009-02-05
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