发明授权
US07660270B2 Computer system and method using efficient module and backplane tiling to interconnect computer nodes via a Kautz-like digraph
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计算机系统和方法使用高效模块和背板平铺,通过考茨特图连接计算机节点
- 专利标题: Computer system and method using efficient module and backplane tiling to interconnect computer nodes via a Kautz-like digraph
- 专利标题(中): 计算机系统和方法使用高效模块和背板平铺,通过考茨特图连接计算机节点
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申请号: US11594416申请日: 2006-11-08
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公开(公告)号: US07660270B2公开(公告)日: 2010-02-09
- 发明人: Judson S. Leonard , Matthew H. Reilly , Lawrence C. Stewart , Washington Taylor
- 申请人: Judson S. Leonard , Matthew H. Reilly , Lawrence C. Stewart , Washington Taylor
- 申请人地址: US MA Maynard
- 专利权人: SiCortex, Inc.
- 当前专利权人: SiCortex, Inc.
- 当前专利权人地址: US MA Maynard
- 代理机构: Chapin IP Law, LLC
- 主分类号: H04L12/28
- IPC分类号: H04L12/28
摘要:
Computer systems and methods using efficient module and backplane tiling to interconnect computer nodes via a Kautz-like digraph. A multinode computing system includes a large plurality of computing nodes interconnected via a Kautz topology having order O, diameter n, and degree k. The order equals (k+1)kn−1. The interconnections from a node x to a node y in the topology satisfy the relationship y=(−x*k−j) mod O, where 1≦j≦k, and the computing nodes are arranged onto a plurality of modules. Each module has an equal plurality of computing nodes on it. A majority of the inter-node connections are contained on the plurality of modules and a minority of the inter-node connections are inter-module connections. Inter-module connections are routed among modules in parallel on an inter-module connection plane.
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