Invention Grant
US07662254B2 Methods of and apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer
有权
用于在处理室中对准电极的方法和装置,以保护晶片边缘环境内的排除区域
- Patent Title: Methods of and apparatus for aligning electrodes in a process chamber to protect an exclusion area within an edge environ of a wafer
- Patent Title (中): 用于在处理室中对准电极的方法和装置,以保护晶片边缘环境内的排除区域
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Application No.: US11704870Application Date: 2007-02-08
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Publication No.: US07662254B2Publication Date: 2010-02-16
- Inventor: Gregory S. Sexton , Andrew D. Bailey, III , Alan M. Schoepp , John D. Boniface
- Applicant: Gregory S. Sexton , Andrew D. Bailey, III , Alan M. Schoepp , John D. Boniface
- Applicant Address: US CA Fremont
- Assignee: Lam Research Corporation
- Current Assignee: Lam Research Corporation
- Current Assignee Address: US CA Fremont
- Agency: Martine Penilla & Gencarella LLP
- Main IPC: C23F1/00
- IPC: C23F1/00 ; H01L21/306

Abstract:
Positional relationships are established in a process chamber. A base is configured with a lower electrode surface to support a wafer, and an upper electrode has a lower surface. A drive mounted on the base has a linkage connected to the upper electrode. A fixture placed on the lower surface moves into a desired orientation of the lower electrode. With the upper electrode loosely connected by the linkage to the drive, the fixture transfers the desired orientation to the upper electrode. The linkage is tightened to maintain the desired orientation, the fixture is removed and a process exclusion insert is mounted to the upper electrode. The drive moves the upper electrode and the insert to define an inactive process zone between the upper electrode and the wafer on the lower electrode to protect a central area of the wafer during etching of a wafer edge environ around the central area.
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