发明授权
US07669009B2 Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches
有权
用于预测受害者选择以减少包容性缓存中不期望的替换行为的方法和装置
- 专利标题： Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches
- 专利标题（中）： 用于预测受害者选择以减少包容性缓存中不期望的替换行为的方法和装置
-
申请号： US10950279申请日： 2004-09-23
-
公开(公告)号： US07669009B2公开(公告)日： 2010-02-23
- 发明人: Sailesh Kottapalli , John H. Crawford
- 申请人： Sailesh Kottapalli , John H. Crawford
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号： G06F12/08
- IPC分类号： G06F12/08
摘要：
A method and apparatus for selecting and updating a replacement candidate in a cache is disclosed. In one embodiment, a cache miss may initiate the eviction of a present replacement candidate in a last-level cache. The cache miss may also initiate the selection of a future replacement candidate. Upon the selection of the future replacement candidate, the corresponding cache line may be invalidated in lower-level caches but remain resident in the last-level cache. The future replacement candidate may be updated by subsequent hits to the replacement candidate in the last-level cache prior to a subsequent cache miss.
公开/授权文献
信息查询
