Invention Grant
US07669009B2 Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches
有权
用于预测受害者选择以减少包容性缓存中不期望的替换行为的方法和装置
- Patent Title: Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches
- Patent Title (中): 用于预测受害者选择以减少包容性缓存中不期望的替换行为的方法和装置
-
Application No.: US10950279Application Date: 2004-09-23
-
Publication No.: US07669009B2Publication Date: 2010-02-23
- Inventor: Sailesh Kottapalli , John H. Crawford
- Applicant: Sailesh Kottapalli , John H. Crawford
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F12/08
- IPC: G06F12/08
Abstract:
A method and apparatus for selecting and updating a replacement candidate in a cache is disclosed. In one embodiment, a cache miss may initiate the eviction of a present replacement candidate in a last-level cache. The cache miss may also initiate the selection of a future replacement candidate. Upon the selection of the future replacement candidate, the corresponding cache line may be invalidated in lower-level caches but remain resident in the last-level cache. The future replacement candidate may be updated by subsequent hits to the replacement candidate in the last-level cache prior to a subsequent cache miss.
Public/Granted literature
Information query
