发明授权
US07671457B1 Semiconductor package including top-surface terminals for mounting another semiconductor package
有权
半导体封装包括用于安装另一半导体封装的顶表面端子
- 专利标题: Semiconductor package including top-surface terminals for mounting another semiconductor package
- 专利标题(中): 半导体封装包括用于安装另一半导体封装的顶表面端子
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申请号: US11595411申请日: 2006-11-09
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公开(公告)号: US07671457B1公开(公告)日: 2010-03-02
- 发明人: David Jon Hiner , Ronald Patrick Huemoeller , Sukianto Rusli
- 申请人: David Jon Hiner , Ronald Patrick Huemoeller , Sukianto Rusli
- 申请人地址: US AZ Chandler
- 专利权人: Amkor Technology, Inc.
- 当前专利权人: Amkor Technology, Inc.
- 当前专利权人地址: US AZ Chandler
- 代理机构: Gunnison, McKay & Hodgson, L.L.P.
- 代理商 Serge J. Hodgson
- 主分类号: H01L23/02
- IPC分类号: H01L23/02 ; H01L23/52
摘要:
A semiconductor package including top-surface terminals for mounting another semiconductor package provides a three-dimensional circuit configuration that can provide removable connection of existing grid-array packages having a standard design. A semiconductor die is mounted on an electrically connected to a circuit substrate having terminals disposed on a bottom side for connection to an external system. The die and substrate are encapsulated and vias are laser-ablated or otherwise formed through the encapsulation to terminals on the top surface of the substrate that provide a grid array mounting lands to which another grid array semiconductor package may be mounted. The bottom side of the vias may terminate and electrically connect to terminals on the substrate, terminals on the bottom of the semiconductor package (through terminals) or terminals on the top of the semiconductor die. The vias may be plated, paste-filled, filled with a low melting point alloy and may have a conical profile for improved plating performance.
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