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US07672178B2 Dynamic adaptive read return of DRAM data 有权
动态自适应读取DRAM数据

Dynamic adaptive read return of DRAM data
摘要:
An integrated circuit communicates with memory devices. Data from the memory devices arrives at the integrated circuit with varying propagation delays. The integrated circuit detects the arrival of data from the memory devices, and stores the data in FIFOs. A FIFO drain signal is generated responsive to the detection of the data arrival.
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