发明授权
US07675179B2 Device and method to eliminate shorting induced by via to metal misalignment
有权
消除由通孔到金属不对准引起的短路的装置和方法
- 专利标题: Device and method to eliminate shorting induced by via to metal misalignment
- 专利标题(中): 消除由通孔到金属不对准引起的短路的装置和方法
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申请号: US11738050申请日: 2007-04-20
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公开(公告)号: US07675179B2公开(公告)日: 2010-03-09
- 发明人: Ranbir Singh , Sen Sidhartha , Nace Rossi
- 申请人: Ranbir Singh , Sen Sidhartha , Nace Rossi
- 申请人地址: US PA Allentown
- 专利权人: Agere Systems Inc.
- 当前专利权人: Agere Systems Inc.
- 当前专利权人地址: US PA Allentown
- 主分类号: H01L23/522
- IPC分类号: H01L23/522
摘要:
The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided.
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