Device and method to eliminate shorting induced by via to metal misalignment
    1.
    发明授权
    Device and method to eliminate shorting induced by via to metal misalignment 有权
    消除由通孔到金属不对准引起的短路的装置和方法

    公开(公告)号:US07675179B2

    公开(公告)日:2010-03-09

    申请号:US11738050

    申请日:2007-04-20

    IPC分类号: H01L23/522

    摘要: The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided.

    摘要翻译: 本发明提供了可以用于集成电路中的互连。 互连包括位于衬底上的金属线,位于金属线上方的电介质层和位于电介质层中的互连,其包括位于金属线上的着陆部分和位于金属线的至少一部分上的非上限部分 金属线的侧边。 至少部分地用聚合物填充未上敷的部分,并且所述着陆部分基本上填充有导电材料。 还提供了用于制造互连的方法。

    DEVICE AND METHOD TO ELIMINATE SHORTING INDUCED BY VIA TO METAL MISALIGNMENT
    2.
    发明申请
    DEVICE AND METHOD TO ELIMINATE SHORTING INDUCED BY VIA TO METAL MISALIGNMENT 有权
    消除由威盛引起的金属偏差的设备和方法

    公开(公告)号:US20070190803A1

    公开(公告)日:2007-08-16

    申请号:US11738050

    申请日:2007-04-20

    IPC分类号: H01L21/31 H01L21/469

    摘要: The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided.

    摘要翻译: 本发明提供了可以用于集成电路中的互连。 互连包括位于衬底上的金属线,位于金属线上方的电介质层和位于电介质层中的互连,其包括位于金属线上的着陆部分和位于金属线的至少一部分上的非上限部分 金属线的侧边。 至少部分地用聚合物填充未上敷的部分,并且所述着陆部分基本上填充有导电材料。 还提供了用于制造互连的方法。

    Device and method to eliminate shorting induced by via to metal misalignment
    3.
    发明申请
    Device and method to eliminate shorting induced by via to metal misalignment 有权
    消除由通孔到金属不对准引起的短路的装置和方法

    公开(公告)号:US20050260843A1

    公开(公告)日:2005-11-24

    申请号:US10850812

    申请日:2004-05-21

    摘要: The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided.

    摘要翻译: 本发明提供了可以用于集成电路中的互连。 互连包括位于衬底上的金属线,位于金属线上方的电介质层和位于电介质层中的互连,其包括位于金属线上的着陆部分和位于金属线的至少一部分上的非上限部分 金属线的侧边。 至少部分地用聚合物填充未上敷的部分,并且所述着陆部分基本上填充有导电材料。 还提供了用于制造互连的方法。

    Device and method to eliminate shorting induced by via to metal misalignment
    4.
    发明授权
    Device and method to eliminate shorting induced by via to metal misalignment 有权
    消除由通孔到金属不对准引起的短路的装置和方法

    公开(公告)号:US07235489B2

    公开(公告)日:2007-06-26

    申请号:US10850812

    申请日:2004-05-21

    IPC分类号: H01L21/44 H01L21/4763

    摘要: The present invention provides an interconnect that can be employed in an integrated circuit. The interconnect includes a metal line located over a substrate, a dielectric layer located over the metal line, and an interconnect located in the dielectric layer, including a landed portion located over the metal line and an unlanded portion located along at least a portion of a lateral edge of the metal line. The unlanded portion is at least partially filled with a polymer, and the landed portion is substantially filled with a conductive material. A method for manufacturing the interconnect is also provided.

    摘要翻译: 本发明提供了可以用于集成电路中的互连。 互连包括位于衬底上的金属线,位于金属线上方的电介质层和位于电介质层中的互连,其包括位于金属线上的着陆部分和位于金属线的至少一部分上的非上限部分 金属线的侧边。 至少部分地用聚合物填充未上敷的部分,并且所述着陆部分基本上填充有导电材料。 还提供了用于制造互连的方法。