发明授权
- 专利标题： Method of designing and manufacturing semiconductor device
- 专利标题（中）： 半导体器件的设计和制造方法
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申请号： US11858551申请日： 2007-09-20
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公开(公告)号： US07681155B2公开(公告)日： 2010-03-16
- 发明人: Shigeyuki Takagi , Shigeru Kinoshita , Hiroshi Watanabe , Toshitake Yaegashi
- 申请人： Shigeyuki Takagi , Shigeru Kinoshita , Hiroshi Watanabe , Toshitake Yaegashi
- 申请人地址： JP Tokyo
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Tokyo
- 代理机构： Pearne & Gordon LLP
- 优先权： JP2007-084989 20070328
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A semiconductor device designing method includes calculating capacitance. The semiconductor device has a semiconductor substrate, an insulator formed on the semiconductor substrate, and an electrode formed on the insulator. The capacitance is calculated under an approximation assuming a portion of the semiconductor substrate, the insulator and a portion of the electrode to be one of a conductor and a dielectric depending on electric characteristics thereof, respectively.
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