发明授权
- 专利标题: MOS devices with multi-layer gate stack
- 专利标题(中): 具有多层门极堆叠的MOS器件
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申请号: US12347061申请日: 2008-12-31
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公开(公告)号: US07683443B2公开(公告)日: 2010-03-23
- 发明人: Chun-Li Liu , Marius K. Orlowski , Matthew W. Stoker
- 申请人: Chun-Li Liu , Marius K. Orlowski , Matthew W. Stoker
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: Ingrassia, Fisher & Lorenz, P.C.
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
An embodiment of a semiconductor device includes a semiconductor substrate having a principal surface, spaced-apart source and drain regions separated by a channel region at the principal surface, and a multilayered gate structure located over the channel region. The multilayered gate structure includes a gate dielectric layer in contact with the channel region, a first conductor comprising a metal oxide overlying the gate dielectric layer, a second conductor overlying the first conductor, and an impurity migration inhibiting layer between the gate dielectric layer and the first conductor or between the first conductor and the second conductor.
公开/授权文献
- US20090115001A1 MOS DEVICES WITH MULTI-LAYER GATE STACK 公开/授权日:2009-05-07
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