发明授权
- 专利标题: Output circuit
- 专利标题(中): 输出电路
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申请号: US12104063申请日: 2008-04-16
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公开(公告)号: US07683600B2公开(公告)日: 2010-03-23
- 发明人: Jiro Kanamaru , Toshiaki Akioka
- 申请人: Jiro Kanamaru , Toshiaki Akioka
- 申请人地址: JP Kanagawa
- 专利权人: NEC Electronics Corporation
- 当前专利权人: NEC Electronics Corporation
- 当前专利权人地址: JP Kanagawa
- 代理机构: Sughrue Mion, PLLC
- 优先权: JP2007-111958 20070420
- 主分类号: G05F3/16
- IPC分类号: G05F3/16
摘要:
An output circuit in accordance with one embodiment of the present invention includes: an input terminal for receiving an input signal; an output transistor connected between a first power supply and an output terminal; a current control circuit connected to the input terminal and the output transistor for controlling current outflow and inflow for the gate of the output transistor based on the input signal; a voltage generating circuit connected to the first power supply; and a switch circuit coupled between the gate of the output transistor and the voltage generating circuit, the switch circuit having alternatively an on state and an off state thereof in response to the input signal; wherein the switch circuit becomes the off state when the potential difference between the gate of the output transistor and the first power supply becomes equal to or below a predetermine value regardless of the voltage level of the input signal.
公开/授权文献
- US20080258702A1 OUTPUT CIRCUIT 公开/授权日:2008-10-23
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