Invention Grant
- Patent Title: Low noise logarithmic detector
- Patent Title (中): 低噪声对数检波器
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Application No.: US11686324Application Date: 2007-03-14
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Publication No.: US07683694B2Publication Date: 2010-03-23
- Inventor: Mark R. Gehring
- Applicant: Mark R. Gehring
- Applicant Address: US CA San Mateo
- Assignee: Quantance, Inc.
- Current Assignee: Quantance, Inc.
- Current Assignee Address: US CA San Mateo
- Agency: Fenwick & West LLP
- Main IPC: G06G7/24
- IPC: G06G7/24

Abstract:
A logarithmic detector circuit including a drive circuit to receive a modulated input signal and generate a buffered modulated signal, a signal shaping circuit coupled to the drive circuit and configured to shape a voltage range of the buffered modulated signal to generate a shaped modulated signal, and a detecting circuit to detect the shaped modulated signal to generate an output signal substantially proportional to a logarithm of an amplitude of the modulated input signal.
Public/Granted literature
- US20080225988A1 LOW NOISE LOGARITHMIC DETECTOR Public/Granted day:2008-09-18
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