Invention Grant
- Patent Title: Semiconductor device and method for manufacturing same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US10740813Application Date: 2003-12-22
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Publication No.: US07687918B2Publication Date: 2010-03-30
- Inventor: Yorinobu Kunimune , Mieko Hasegawa , Takamasa Itou , Takeshi Takeda , Hidemitsu Aoki
- Applicant: Yorinobu Kunimune , Mieko Hasegawa , Takamasa Itou , Takeshi Takeda , Hidemitsu Aoki
- Applicant Address: JP Kawasaki, Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kawasaki, Kanagawa
- Agency: McGinn I.P. Law Group, PLLC
- Priority: JP2002-379278 20021227
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
The present invention provides a semiconductor device comprising a metal interconnect having considerably improved electromigration resistance and/or stress migration resistance. The copper interconnect 107 comprises a silicon-lower concentration region 104 and a silicon solid solution layer 106 disposed thereon. The silicon solid solution layer 106 has a structure, in which silicon atoms are introduced within the crystal lattice structure that constitutes the copper interconnect 107 to be disposed within the lattice as inter-lattice point atoms or substituted atoms. The silicon solid solution layer 106 has the structure, in which the crystal lattice structure of copper (face centered cubic lattice; lattice constant is 3.6 angstrom) remains, while silicon atoms are introduced as inter-lattice point atoms or substituted atoms.
Public/Granted literature
- US20040130030A1 Semiconductor device and method for manufacturing same Public/Granted day:2004-07-08
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