发明授权
- 专利标题: Matched analog CMOS transistors with extension wells
- 专利标题(中): 具有扩展阱的匹配模拟CMOS晶体管
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申请号: US11948172申请日: 2007-11-30
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公开(公告)号: US07692217B2公开(公告)日: 2010-04-06
- 发明人: Henry Litzmann Edwards , Hisashi Shichijo , Tathagata Chatterjee , Shyh-Horng Yang , Lance Stanford Robertson
- 申请人: Henry Litzmann Edwards , Hisashi Shichijo , Tathagata Chatterjee , Shyh-Horng Yang , Lance Stanford Robertson
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
- 主分类号: H01L27/148
- IPC分类号: H01L27/148
摘要:
One embodiment of the invention relates to an integrated circuit. The integrated circuit includes a first matched transistor comprising: a first source region, a first drain region formed within a first drain well extension, and a first gate electrode having lateral edges about which the first source region and first drain region are laterally disposed. The integrated circuit also includes a second matched transistor comprising: a second source region, a second drain region formed within a second drain well extension, and a second gate electrode having lateral edges about which the second source region and second drain region are laterally disposed. Analog circuitry is associated with the first and second matched transistors, which analog circuitry utilizes a matching characteristic of the first and second matched transistors to facilitate analog functionality. Other devices, methods, and systems are also disclosed.
公开/授权文献
- US20090140346A1 MATCHED ANALOG CMOS TRANSISTORS WITH EXTENSION WELLS 公开/授权日:2009-06-04
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