发明授权
- 专利标题: Minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry
- 专利标题(中): 使用系数对称的多相插值滤波器的最小面积集成电路实现
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申请号: US11215319申请日: 2005-08-29
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公开(公告)号: US07698355B2公开(公告)日: 2010-04-13
- 发明人: Aditya Bhuvanagiri , Harvinder Singh , Rakesh Malik , Nitin Chawla
- 申请人: Aditya Bhuvanagiri , Harvinder Singh , Rakesh Malik , Nitin Chawla
- 申请人地址: IN Uttar Pradesh
- 专利权人: STMicroelectronics Pvt. Ltd.
- 当前专利权人: STMicroelectronics Pvt. Ltd.
- 当前专利权人地址: IN Uttar Pradesh
- 代理机构: Seed IP Law Group PLLC
- 代理商 Lisa K. Jorgenson; E. Russell Tarleton
- 优先权: IN1630/DEL/2004 20040827
- 主分类号: G06F17/17
- IPC分类号: G06F17/17 ; G06F15/00 ; G11C19/00 ; H04B1/10
摘要:
A minimal area integrated polyphase interpolation filter uses a symmetry of coefficients for a channel of input data. The filter includes an input interface block for synchronizing the input signal to a first internal clock signal; a memory block for providing multiple delayed output signals; a multiplexer input interface block for outputting a selected plurality of signals for generating mirror image coefficient sets in response to a second set of internal control signals, a coefficient block for generating mirror image and/or symmetric coefficient sets, and to output a plurality of filtered signals, an output multiplexer block for performing selection, gain control and data width control on said plurality of filtered signals, an output register block synchronizing the filtered signals, and a control block generating clock signals for realization of the filter and to delay between two channels to access a coefficient set, thereby minimizing hardware in the filter.
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