发明授权
US07733724B2 Controlling global bit line pre-charge time for high speed eDRAM
有权
控制高速eDRAM的全局位线预充电时间
- 专利标题: Controlling global bit line pre-charge time for high speed eDRAM
- 专利标题(中): 控制高速eDRAM的全局位线预充电时间
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申请号: US11970188申请日: 2008-01-07
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公开(公告)号: US07733724B2公开(公告)日: 2010-06-08
- 发明人: Kuoyuan (Peter) Hsu , Bing Wang , Young Suk Kim
- 申请人: Kuoyuan (Peter) Hsu , Bing Wang , Young Suk Kim
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: G11C7/00
- IPC分类号: G11C7/00
摘要:
A method of operating a memory includes performing a write operation and a read operation on a memory cell. The write operation includes starting a first global bit line (GBL) pre-charge on a GBL; and after the first GBL pre-charge is started, enabling a word line to write into the memory cell, wherein the steps of starting the first GBL pre-charge and enabling the word line have a first time interval. The read operation includes starting a second GBL pre-charge on the GBL; and after the second GBL pre-charge is started, enabling the word line to read from the memory cell, wherein the steps of starting the second GBL pre-charge and enabling the word line have a second time interval. The first time interval is greater than the second time interval.