发明授权
US07739637B2 Partial good schema for integrated circuits having parallel execution units
失效
具有并行执行单元的集成电路的部分良好架构
- 专利标题: Partial good schema for integrated circuits having parallel execution units
- 专利标题(中): 具有并行执行单元的集成电路的部分良好架构
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申请号: US12362541申请日: 2009-01-30
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公开(公告)号: US07739637B2公开(公告)日: 2010-06-15
- 发明人: Kenneth Joseph Goodnow , Michael Richard Ouellette , Stephen Gerard Shuma , Peter Albert Twombly
- 申请人: Kenneth Joseph Goodnow , Michael Richard Ouellette , Stephen Gerard Shuma , Peter Albert Twombly
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Hoffman Warnick LLC
- 代理商 W. Riyon Harding
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Processing engines (PE's) disposed on the substrate. Each processing engine includes a measurement and storage unit, and a PE controller coupled to each of the processing engines. The processing engines perform self-tests and store the results of the self-tests in the measurement and storage unit. The PE controller reads the results and selects a sub-set of processing engines based on the results and an optimization algorithm.
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