发明授权
- 专利标题： Semiconductor device and method of forming through vias with reflowed conductive material
- 专利标题（中）： 用回流导电材料形成通孔的半导体器件和方法
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申请号： US12127417申请日： 2008-05-27
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公开(公告)号： US07741156B2公开(公告)日： 2010-06-22
- 发明人: Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
- 申请人： Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
- 申请人地址： SG Singapore
- 专利权人： STATS ChipPAC, Ltd.
- 当前专利权人： STATS ChipPAC, Ltd.
- 当前专利权人地址： SG Singapore
- 代理商 Robert D. Atkins
- 主分类号： H01L21/00
- IPC分类号： H01L21/00
摘要：
A semiconductor device is made by providing a first semiconductor wafer having semiconductor die. A gap is made between the semiconductor die. An insulating material is deposited in the gap. A portion of the insulating material is removed to form a first through hole via (THV). A conductive lining is conformally deposited in the first THV. A solder material is disposed above the conductive lining of the first THV. A second semiconductor wafer having semiconductor die is disposed over the first wafer. A second THV is formed in a gap between the die of the second wafer. A conductive lining is conformally deposited in the second THV. A solder material is disposed above the second THV. The second THV is aligned to the first THV. The solder material is reflowed to form the conductive vias within the gap. The gap is singulated to separate the semiconductor die.
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