- 专利标题: Solid electrolyte switching device, FPGA using same, memory device, and method for manufacturing solid electrolyte switching device
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申请号: US10512571申请日: 2003-04-25
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公开(公告)号: US07750332B2公开(公告)日: 2010-07-06
- 发明人: Toshitsugu Sakamoto , Masakazu Aono , Tsuyoshi Hasegawa , Tomonobu Nakayama , Hiroshi Sunamura , Hisao Kawaura , Naohiko Sugibayashi
- 申请人: Toshitsugu Sakamoto , Masakazu Aono , Tsuyoshi Hasegawa , Tomonobu Nakayama , Hiroshi Sunamura , Hisao Kawaura , Naohiko Sugibayashi
- 申请人地址: JP Kawaguchi-shi JP Wako-shi JP Tokyo
- 专利权人: Japan Science and Technology Agency,Riken,NEC Corporation
- 当前专利权人: Japan Science and Technology Agency,Riken,NEC Corporation
- 当前专利权人地址: JP Kawaguchi-shi JP Wako-shi JP Tokyo
- 代理机构: Westerman, Hattori, Daniels & Adrian, LLP
- 优先权: JP2002-129283 20020430; JP2002-346129 20021128
- 国际申请: PCT/JP03/05393 WO 20030425
- 国际公布: WO03/094227 WO 20031113
- 主分类号: H01L47/00
- IPC分类号: H01L47/00
摘要:
The present invention provides a solid electrolyte switching device, which can maintain an on or off state when the power source is removed, the resistance of which in on the state is low, and which is capable of integration and re-programming, and FPGA and a memory device using the same, and a method of manufacturing the same.A solid electrolyte switching device (10, 10′, 20, 20′) comprises a substrate (11) in which surface is coated with an insulation layer, a first interconnection layer (13) set on said substrate (11), an ion supplying layer (17) set on said first interconnection layer (13), a solid electrolyte layer (16) set on said ion supplying layer (17), an interlevel insulating layer (12) having a via hole set to cover said first interconnection layer (13), said ion supplying layer (17), and said solid electrolyte layer (16), a counter electrode layer (15) set to contact said solid electrolyte layer (16) through the via hole of said interlevel insulating layer (12), and a second interconnection layer (14) set to cover said counter electrode layer (15). The switching device can be provided in which the on state, or the off state can be arbitrarily set by the threshold voltage applied between the ion supplying layer (17) and the counter electrode layer (15), which is non-volatile, and the resistance of which in the on state is low. The switching device of the present invention is also simple and fine in structure, and hence makes it possible to provide smaller switching devices than are currently available. Further, using the switching device of the present invention as the switching device of an FPGA (30) makes it possible to provide re-programmable and fast operation FPGA (30). Using the switching device of the present invention as a memory cell of a memory device makes it possible to provide a non-volatile memory device with high programming and reading speed.
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