公开(公告)号：US20050127524A1

公开(公告)日：2005-06-16

申请号：US10512571

申请日：2003-04-25

申请人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonobu Nakayama ,  Hiroshi Sunamura ,  Hisao Kawaura ,  Naohiko Sugibayashi

发明人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonobu Nakayama ,  Hiroshi Sunamura ,  Hisao Kawaura ,  Naohiko Sugibayashi

IPC分类号： G11C13/02 ,  H01L27/10 ,  H01L45/00 ,  H01L21/8238 ,  H01L21/4763 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： G11C13/0011 ,  G11C2213/15 ,  G11C2213/56 ,  G11C2213/79 ,  H01L27/101 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/144 ,  H01L45/1633 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a solid electrolyte switching device, which can maintain an on or off state when the power source is removed, the resistance of which in on the state is low, and which is capable of integration and re-programming, and FPGA and a memory device using the same, and a method of manufacturing the same. A solid electrolyte switching device (10, 10′, 20, 20′) comprises a substrate (11) in which surface is coated with an insulation layer, a first interconnection layer (13) set on said substrate (11), an ion supplying layer (17) set on said first interconnection layer (13), a solid electrolyte layer (16) set on said ion supplying layer (17), an interlevel insulating layer (12) having a via hole set to cover said first interconnection layer (13), said ion supplying layer (17), and said solid electrolyte layer (16), a counter electrode layer (15) set to contact said solid electrolyte layer (16) through the via hole of said interlevel insulating layer (12), and a second interconnection layer (14) set to cover said counter electrode layer (15). The switching device can be provided in which the on state, or the off state can be arbitrarily set by the threshold voltage applied between the ion supplying layer (17) and the counter electrode layer (15), which is non-volatile, and the resistance of which in the on state is low. The switching device of the present invention is also simple and fine in structure, and hence makes it possible to provide smaller switching devices than are currently available. Further, using the switching device of the present invention as the switching device of an FPGA (30) makes it possible to provide re-programmable and fast operation FPGA (30). Using the switching device of the present invention as a memory cell of a memory device makes it possible to provide a non-volatile memory device with high programming and reading speed.

公开(公告)号：US07750332B2

公开(公告)日：2010-07-06

申请号：US10512571

申请日：2003-04-25

申请人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonobu Nakayama ,  Hiroshi Sunamura ,  Hisao Kawaura ,  Naohiko Sugibayashi

发明人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonobu Nakayama ,  Hiroshi Sunamura ,  Hisao Kawaura ,  Naohiko Sugibayashi

IPC分类号： H01L47/00

CPC分类号： G11C13/0011 ,  G11C2213/15 ,  G11C2213/56 ,  G11C2213/79 ,  H01L27/101 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/144 ,  H01L45/1633 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a solid electrolyte switching device, which can maintain an on or off state when the power source is removed, the resistance of which in on the state is low, and which is capable of integration and re-programming, and FPGA and a memory device using the same, and a method of manufacturing the same.A solid electrolyte switching device (10, 10′, 20, 20′) comprises a substrate (11) in which surface is coated with an insulation layer, a first interconnection layer (13) set on said substrate (11), an ion supplying layer (17) set on said first interconnection layer (13), a solid electrolyte layer (16) set on said ion supplying layer (17), an interlevel insulating layer (12) having a via hole set to cover said first interconnection layer (13), said ion supplying layer (17), and said solid electrolyte layer (16), a counter electrode layer (15) set to contact said solid electrolyte layer (16) through the via hole of said interlevel insulating layer (12), and a second interconnection layer (14) set to cover said counter electrode layer (15). The switching device can be provided in which the on state, or the off state can be arbitrarily set by the threshold voltage applied between the ion supplying layer (17) and the counter electrode layer (15), which is non-volatile, and the resistance of which in the on state is low. The switching device of the present invention is also simple and fine in structure, and hence makes it possible to provide smaller switching devices than are currently available. Further, using the switching device of the present invention as the switching device of an FPGA (30) makes it possible to provide re-programmable and fast operation FPGA (30). Using the switching device of the present invention as a memory cell of a memory device makes it possible to provide a non-volatile memory device with high programming and reading speed.

公开(公告)号：US07875883B2

公开(公告)日：2011-01-25

申请号：US10490598

申请日：2002-09-24

申请人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonobu Nakayama ,  Kazuya Terabe ,  Hisao Kawaura ,  Tadahiko Sugibayashi

发明人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonobu Nakayama ,  Kazuya Terabe ,  Hisao Kawaura ,  Tadahiko Sugibayashi

IPC分类号： H01L29/06

CPC分类号： G11C13/0011 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/15 ,  G11C2213/72 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/085 ,  H01L45/1206 ,  H01L45/1233 ,  H01L45/142 ,  H01L45/16 ,  H01L45/1633

摘要： The present invention relates to a transistor for selecting a storage cell and a switch using a solid electrolyte. In a storage cell, a metal is stacked on a drain diffusion layer of a field-effect transistor formed on a semiconductor substrate surface. The solid electrolyte using the metal as a carrier is stacked on the metal. The solid electrolyte contacts with the metal via a gap, and the metal is connected to a common grounding conductor. A source of the field-effect transistor is connected to a column address line, and a gate of the field-effect transistor is connected to a row address line.

摘要翻译： 本发明涉及用于选择存储单元的晶体管和使用固体电解质的开关。 在存储单元中，在形成在半导体衬底表面上的场效应晶体管的漏极扩散层上堆叠金属。 使用金属作为载体的固体电解质堆叠在金属上。 固体电解质通过间隙与金属接触，并且金属连接到公共接地导体。 场效应晶体管的源极连接到列地址线，并且场效应晶体管的栅极连接到行地址线。

公开(公告)号：US20060157802A1

公开(公告)日：2006-07-20

申请号：US10490598

申请日：2002-09-24

申请人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonbu Nakayama ,  Kazuya Terabe ,  Hisao Kawaura ,  Tadahiko Sugibayashi

发明人： Toshitsugu Sakamoto ,  Masakazu Aono ,  Tsuyoshi Hasegawa ,  Tomonbu Nakayama ,  Kazuya Terabe ,  Hisao Kawaura ,  Tadahiko Sugibayashi

IPC分类号： H01L29/76

CPC分类号： G11C13/0011 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/15 ,  G11C2213/72 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/085 ,  H01L45/1206 ,  H01L45/1233 ,  H01L45/142 ,  H01L45/16 ,  H01L45/1633

摘要： The present invention relates to a transistor for selecting a storage cell and a switch using a solid electrolyte. In a storage cell, a metal is stacked on a drain diffusion layer of a field-effect transistor formed on a semiconductor substrate surface. The solid electrolyte using the metal as a carrier is stacked on the metal. The solid electrolyte contacts with the metal via a gap, and the metal is connected to a common grounding conductor. A source of the field-effect transistor is connected to a column address line, and a gate of the field-effect transistor is connected to a row address line.

摘要翻译： 本发明涉及用于选择存储单元的晶体管和使用固体电解质的开关。 在存储单元中，在形成在半导体衬底表面上的场效应晶体管的漏极扩散层上堆叠金属。 使用金属作为载体的固体电解质堆叠在金属上。 固体电解质通过间隙与金属接触，并且金属连接到公共接地导体。 场效应晶体管的源极连接到列地址线，并且场效应晶体管的栅极连接到行地址线。

公开(公告)号：US20050242283A1

公开(公告)日：2005-11-03

申请号：US10503701

申请日：2003-02-05

申请人： Tsuyoshi Hasegawa ,  Masakazu Aono ,  Tomonobu Nakayama ,  Sumio Hosaka

发明人： Tsuyoshi Hasegawa ,  Masakazu Aono ,  Tomonobu Nakayama ,  Sumio Hosaka

IPC分类号： G01B21/30 ,  G01Q10/04 ,  G01Q10/06 ,  G01Q20/02 ,  G01Q60/24 ,  G01Q60/32 ,  G01Q60/38 ,  G01Q70/12 ,  G01N23/00

CPC分类号： G01Q60/34 ,  G01Q10/06 ,  G01Q30/04 ,  G01Q70/12

摘要： A digital probing type atomic force microscope (AFM) for measuring high aspect structures with high precision. A probe 21 is vibrated while moved to the vicinity of an atomic force region on a specimen surface. The position of the probe is measured when a specified atomic force is detected in the atomic force region. The probe is then moved away from the specimen surface. A servo system for maintaining a gap between the probe and specimen surface is stopped. The probe is moved to a measurement point along the specimen surface while kept away from the specimen. The vibration frequency is a frequency slightly offset from the cantilever resonance point. The atomic force is detected based on the vibration amplitude of the cantilever.

摘要翻译： 数字探测型原子力显微镜（AFM），用于高精度测量高端面结构。 探针21在移动到试样表面的原子力区域附近时振动。 当在原子力区域中检测到指定的原子力时，测量探针的位置。 然后将探头从样品表面移开。 停止用于保持探针和试样表面之间的间隙的伺服系统。 探头沿着试样表面移动到测量点，同时远离试样。 振动频率是与悬臂共振点稍微偏移的频率。 基于悬臂振动幅度检测原子力。

公开(公告)号：US20050014325A1

公开(公告)日：2005-01-20

申请号：US10918360

申请日：2004-08-16

申请人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

发明人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

IPC分类号： G11C11/56 ,  G11C13/02 ,  G11C16/02 ,  H01L27/24 ,  H01L27/28 ,  H01L29/24 ,  H01L29/26 ,  H01L29/45 ,  H01L51/00 ,  H01L51/30 ,  H03K19/02 ,  H01L21/00

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C11/5614 ,  G11C13/0004 ,  G11C13/0009 ,  G11C13/0011 ,  G11C2213/77 ,  G11C2213/81 ,  H01L27/2463 ,  H01L29/242 ,  H01L29/26 ,  H01L29/45 ,  H01L45/085 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/146 ,  H01L45/1633 ,  H03K17/545 ,  H03K19/02

摘要： A NOT circuit realized using an atomic switch serving as a two terminal device and including a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance. Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material.

摘要翻译： 使用用作双端子器件的原子开关实现的NOT电路，并且包括由具有离子导电性和电子导电性的复合导电材料制成的第一电极和由导电物质制成的第二电极。 Ag2S，Ag2Se，Cu2S或Cu2Se优选用作复合导电材料。

公开(公告)号：US20050243844A1

公开(公告)日：2005-11-03

申请号：US11165037

申请日：2005-06-24

申请人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

发明人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

IPC分类号： G11C11/56 ,  G11C13/02 ,  G11C16/02 ,  H01L27/24 ,  H01L27/28 ,  H01L29/24 ,  H01L29/26 ,  H01L29/45 ,  H01L51/00 ,  H01L51/30 ,  H03K19/02 ,  H04L12/28 ,  H04L12/56

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C11/5614 ,  G11C13/0004 ,  G11C13/0009 ,  G11C13/0011 ,  G11C2213/77 ,  G11C2213/81 ,  H01L27/2463 ,  H01L29/242 ,  H01L29/26 ,  H01L29/45 ,  H01L45/085 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/146 ,  H01L45/1633 ,  H03K17/545 ,  H03K19/02

摘要： There are provided a point contact array, in which a plurality of point contacts are arranged, each point contact electrically and reversibly controlling conductance between electrodes and being applicable to an arithmetic circuit, a logic circuit, and a memory device, a NOT circuit, and an electronic circuit using the same. A circuit includes a plurality of point contacts each composed of a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance. The conductance of each point contact is controlled to realize the circuit. Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material. When a semiconductor or insulator material is interposed between the electrodes, a crystal or an amorphous material of GeSx, GeSex, GeTex, or WOx (0

摘要翻译： 提供了一种点接触阵列，其中布置有多个点触点，每个点接触电和可逆地控制电极之间的电导并且可应用于运算电路，逻辑电路和存储器件，NOT电路和 使用该电路的电子电路。 电路包括多个点接点，每个点接触由由具有离子导电性和电子传导性的复合导电材料制成的第一电极和由导电物质制成的第二电极组成。 控制每个点接触的电导以实现电路。 优选使用Ag 2 S，Ag 2 Se，Cu 2 S或Cu 2 Se作为化合物 导电材料。 当在电极之间插入半导体或绝缘体材料时，可以使用GeS x X，Ge x O x Ge，GeTe x x，或 优选使用WO x（0

公开(公告)号：US06833719B2

公开(公告)日：2004-12-21

申请号：US10148900

申请日：2002-06-19

申请人： Tsuyoshi Hasegawa ,  Masakazu Aono ,  Tomonobu Nakayama ,  Taichi Okuda ,  Kazuya Terabe ,  Hirofumi Tanaka

发明人： Tsuyoshi Hasegawa ,  Masakazu Aono ,  Tomonobu Nakayama ,  Taichi Okuda ,  Kazuya Terabe ,  Hirofumi Tanaka

IPC分类号： G01R3102

CPC分类号： G01Q60/40 ,  G01Q60/04 ,  G01R1/06727 ,  G01R1/06738 ,  Y10S977/874

摘要： An apparatus provided for evaluating electrical characteristics by bringing a plurality of metal probes in contact with a sample. A metal probe is formed on a free end of a cantilever on which are formed a resistor, two electrodes for resistance detection, and an electrode for measuring electrical characteristics. A tip of the metal probe projects beyond the free end of the cantilever. The probe position is controlled by an atomic force microscopy.

摘要翻译： 一种用于通过使多个金属探针与样品接触来评估电特性的装置。 金属探针形成在悬臂的自由端上，其上形成电阻器，两个用于电阻检测的电极和用于测量电特性的电极。 金属探针的尖端超出悬臂的自由端。 探针位置由原子力显微镜控制。

公开(公告)号：US07473982B2

公开(公告)日：2009-01-06

申请号：US10918360

申请日：2004-08-16

申请人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

发明人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

IPC分类号： H01L27/24

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C11/5614 ,  G11C13/0004 ,  G11C13/0009 ,  G11C13/0011 ,  G11C2213/77 ,  G11C2213/81 ,  H01L27/2463 ,  H01L29/242 ,  H01L29/26 ,  H01L29/45 ,  H01L45/085 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/146 ,  H01L45/1633 ,  H03K17/545 ,  H03K19/02

摘要： A NOT circuit realized using an atomic switch serving as a two terminal device and including a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance. Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material.

摘要翻译： 使用用作双端子器件的原子开关实现的NOT电路，并且包括由具有离子导电性和电子导电性的复合导电材料制成的第一电极和由导电物质制成的第二电极。 Ag2S，Ag2Se，Cu2S或Cu2Se优选用作复合导电材料。

公开(公告)号：US07026911B2

公开(公告)日：2006-04-11

申请号：US10363259

申请日：2001-10-29

申请人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

发明人： Masakazu Aono ,  Tsuyoshi Hasegawa ,  Kazuya Terabe ,  Tomonobu Nakayama

IPC分类号： H01C1/012

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C11/5614 ,  G11C13/0004 ,  G11C13/0009 ,  G11C13/0011 ,  G11C2213/77 ,  G11C2213/81 ,  H01L27/2463 ,  H01L29/242 ,  H01L29/26 ,  H01L29/45 ,  H01L45/085 ,  H01L45/1266 ,  H01L45/142 ,  H01L45/143 ,  H01L45/146 ,  H01L45/1633 ,  H03K17/545 ,  H03K19/02

摘要： A point contact array, including plural point contacts electrically and reversibly controlling conductance between electrodes and being applicable to an arithmetic circuit, a logic circuit, a memory device, a NOT circuit, and an electronic circuit including the same. The circuit includes plural point contacts each including a first electrode made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode made of a conductive substance. The conductance of each point contact is controlled to realize the circuit. Ag2S, Ag2Se, Cu2S, or Cu2Se is preferably used as the compound conductive material. When a semiconductor or insulator material is interposed between the electrodes, a crystal or an amorphous material of GeSx, GeSex, GeTex, or WOx (0

摘要翻译： 一种点接触阵列，包括多个点接点，电和可逆地控制电极之间的电导，并且可应用于运算电路，逻辑电路，存储器件，NOT电路和包括其的电子电路。 该电路包括多个点接点，每个接点包括由具有离子导电性和电子导电性的复合导电材料制成的第一电极和由导电物质制成的第二电极。 控制每个点接触的电导以实现电路。 优选使用Ag 2 S，Ag 2 Se，Cu 2 S或Cu 2 Se作为化合物 导电材料。 当在电极之间插入半导体或绝缘体材料时，可以使用GeS x X，Ge x O x Ge，GeTe x x，或 优选使用WO x（0