发明授权
US07765351B2 High bandwidth low-latency semaphore mapped protocol (SMP) for multi-core systems on chips
失效
用于芯片上多核系统的高带宽低延迟信号量映射协议(SMP)
- 专利标题: High bandwidth low-latency semaphore mapped protocol (SMP) for multi-core systems on chips
- 专利标题(中): 用于芯片上多核系统的高带宽低延迟信号量映射协议(SMP)
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申请号: US11684687申请日: 2007-03-12
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公开(公告)号: US07765351B2公开(公告)日: 2010-07-27
- 发明人: Pascal A. Nsame , Anthony D. Polson , Nancy H. Pratt , Sebastian T. Ventrone
- 申请人: Pascal A. Nsame , Anthony D. Polson , Nancy H. Pratt , Sebastian T. Ventrone
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Downs Rachlin Martin PLLC
- 主分类号: G06F12/00
- IPC分类号: G06F12/00
摘要:
A system and method for dynamically managing movement of semaphore data within the system. The system includes, but is no limited to, a plurality of functional units communicating over the network, a memory device communication with the plurality of functional units over the network, and at least one semaphore storage unit communicating with the plurality of functional unites and the memory device over the network. The plurality of functional units include a plurality of functional unit memory locations. The memory device includes a plurality of memory device memory locations. The at least one semaphore storage unit includes a plurality of semaphore storage unit memory locations. The at least one semaphore storage unit controls dynamic movement of the semaphore data among the plurality of functional unit memory locations, the plurality of memory device memory locations, the plurality of semaphore storage unit memory locations, and any combinations therof.
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