Invention Grant
- Patent Title: Method of manufacturing semicondictor chip
- Patent Title (中): 半导体芯片制造方法
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Application No.: US12517632Application Date: 2008-03-05
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Publication No.: US07767554B2Publication Date: 2010-08-03
- Inventor: Kiyoshi Arita , Atsushi Harikai
- Applicant: Kiyoshi Arita , Atsushi Harikai
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Pearne & Gordon LLP
- Priority: JPP2007-059423 20070309
- International Application: PCT/JP2008/000455 WO 20080305
- International Announcement: WO2008/123012 WO 20081016
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/46 ; H01L21/301

Abstract:
An object is to provide a semiconductor chip manufacturing method capable of removing test patterns in a higher efficiency in simple steps, while a general-purpose characteristic can be secured.In a method in which a semiconductor wafer 1 having integrated circuits 3 formed in a plurality of chip regions and test patterns 4 formed in scribe lines 2a is divided by a plasma etching process so as to manufacture individual semiconductor chips, laser light 5a is irradiated from the side of a circuit forming plane 1a so as to remove the test patterns 4; and thereafter, under such a condition that a circuit protection seat 6 is adhered onto a circuit forming plane 1a, a rear plane of the circuit forming plane 1a is mechanically thinned; a mask-purpose seat is adhered onto the rear plane 1b of the semiconductor wafer 1 after the plane thinning process; and then, a plasma dicing-purpose mask is work-processed by irradiating laser light. As a consequence, the semi-conductor wafer 1 can be held by employing one set of the circuit protection seat 6 from the thinning process up to the plasma dicing process.
Public/Granted literature
- US20100022071A1 METHOD OF MANUFACTURING SEMICONDUCTOR CHIP Public/Granted day:2010-01-28
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