Invention Grant
- Patent Title: Method of manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US11546986Application Date: 2006-10-13
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Publication No.: US07767569B2Publication Date: 2010-08-03
- Inventor: Atsushi Maekawa
- Applicant: Atsushi Maekawa
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2005-317991 20051101
- Main IPC: H01L21/8242
- IPC: H01L21/8242 ; H01L21/336

Abstract:
Method of forming a high-reliability contact plug which prevents a short circuit between the plug and a bit line by applying a material having an etching rate ratio of 100 or more with respect to a silicon nitride film which forms a self-aligned contact plug. After the formation of a bit line, whose top surface and side surfaces are covered with a silicon nitride film, a sacrificial interlayer film is formed which covers the whole surface of the bit line, and a contact hole is formed by etching the sacrificial interlayer film and then the lower-layer interlayer insulating film to form a capacitance contact plug. A column of a capacitance contact plug is then formed by removing the sacrificial interlayer film, a third interlayer insulating film is formed on the column, and part of this interlayer is removed to expose a surface of the contact plug.
Public/Granted literature
- US20070096188A1 Method of manufacturing semiconductor device Public/Granted day:2007-05-03
Information query
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