Nested and isolated transistors with reduced impedance difference

Invention Grant

US07767577B2 Nested and isolated transistors with reduced impedance difference 有权

Title translation: 具有降低阻抗差的嵌套和隔离晶体管

Please log in to see more content

Patent Title: Nested and isolated transistors with reduced impedance difference
Patent Title (中): 具有降低阻抗差的嵌套和隔离晶体管
Application No.: US12031693

Application Date: 2008-02-14
Publication No.: US07767577B2

Publication Date: 2010-08-03
Inventor: Johnny Widodo , Liang Choo Hsia , James Yong Meng Lee , Wen Zhi Gao , Zhao Lun , Huang Liu , Chung Woh Lai , Shailendra Mishra , Yew Tuck Chow , Fang Chen , Shiang Yang Ong
Applicant: Johnny Widodo , Liang Choo Hsia , James Yong Meng Lee , Wen Zhi Gao , Zhao Lun , Huang Liu , Chung Woh Lai , Shailendra Mishra , Yew Tuck Chow , Fang Chen , Shiang Yang Ong
Applicant Address: SG Singapore
Assignee: Chartered Semiconductor Manufacturing, Ltd.
Current Assignee: Chartered Semiconductor Manufacturing, Ltd.
Current Assignee Address: SG Singapore
Agency: Horizon IP Pte Ltd
Main IPC: H01L21/4763
IPC: H01L21/4763 ; H01L21/8234

Nested and isolated transistors with reduced impedance difference

Abstract:

A processing layer, such as silicon, is formed on a metal silicide contact followed by a metal layer. The silicon and metal layers are annealed to increase the thickness of the metal silicide contact. By selectively increasing the thickness of silicide contacts, Rs of transistors in iso and nested regions can be matched.

Abstract(Chinese):

在金属硅化物接触之后形成金属层，例如硅的处理层。对硅和金属层进行退火以增加金属硅化物接触的厚度。通过选择性地增加硅化物接触的厚度，可以匹配异和嵌套区域中的晶体管的Rs。

Public/Granted literature

US20090206408A1 NESTED AND ISOLATED TRANSISTORS WITH REDUCED IMPEDANCE DIFFERENCE Public/Granted day:2009-08-20

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）