Invention Grant
- Patent Title: Methods for forming connective elements on integrated circuits for packaging applications
- Patent Title (中): 在包装应用的集成电路上形成连接元件的方法
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Application No.: US12037248Application Date: 2008-02-26
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Publication No.: US07767586B2Publication Date: 2010-08-03
- Inventor: Steven Verhaverbeke
- Applicant: Steven Verhaverbeke
- Applicant Address: US CA Santa Clara
- Assignee: Applied Materials, Inc.
- Current Assignee: Applied Materials, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Moser IP Law Group
- Main IPC: H01L21/302
- IPC: H01L21/302

Abstract:
Methods for forming connective elements on integrated circuits for packaging applications are provided herein. In some embodiments, a method of forming connective elements on an integrated circuit for flipchip packaging may include providing a resist layer on the integrated circuit; forming a plurality of holes through the resist layer; filling the plurality of holes with conductive material; and stripping at least a portion of the resist layer using a stripping solution containing acetic anhydride and ozone to expose the connective elements.
Public/Granted literature
- US20090111259A1 METHODS FOR FORMING CONNECTIVE ELEMENTS ON INTEGRATED CIRCUITS FOR PACKAGING APPLICATIONS Public/Granted day:2009-04-30
Information query
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