Invention Grant
US07768104B2 Apparatus and method for series connection of two die or chips in single electronics package
有权
在单个电子封装中串联连接两个芯片或芯片的装置和方法
- Patent Title: Apparatus and method for series connection of two die or chips in single electronics package
- Patent Title (中): 在单个电子封装中串联连接两个芯片或芯片的装置和方法
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Application No.: US12050592Application Date: 2008-03-18
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Publication No.: US07768104B2Publication Date: 2010-08-03
- Inventor: Ta-Te Chou , Hui-Ying Ding , Yun Zhang , Hong-Yun He , Li-Zhu Hao
- Applicant: Ta-Te Chou , Hui-Ying Ding , Yun Zhang , Hong-Yun He , Li-Zhu Hao
- Applicant Address: US NY Melville
- Assignee: Vishay General Semiconductor, Inc.
- Current Assignee: Vishay General Semiconductor, Inc.
- Current Assignee Address: US NY Melville
- Agency: Volpe and Koenig, P.C.
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions. Alternatively, it can be by adding an electrically isolating coating on the non-active area of the P-side of a semiconductor device to allow it to be mounted P side down on an electrically conductive substrate or mounting location without modification to the substrate or lead frame.
Public/Granted literature
- US20090236705A1 APPARATUS AND METHOD FOR SERIES CONNECTION OF TWO DIE OR CHIPS IN SINGLE ELECTRONICS PACKAGE Public/Granted day:2009-09-24
Information query
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