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US07768835B2 Non-volatile memory erase verify 有权
非易失性存储器擦除验证

Non-volatile memory erase verify
Abstract:
A memory device having memory cells fabricated in a substrate well is described. The memory device includes control circuitry to perform an erase operation on the memory cells and a voltage bias circuit to bias the substrate well to a positive voltage level during an erase verification operation of memory cells. The voltage bias circuit controls a discharge level of the substrate well following the erase operation to prevent the substrate well from fully discharging lower than the positive voltage level.
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