发明授权
US07768851B2 Apparatus for implementing SRAM cell write performance evaluation
失效
用于实现SRAM单元写入性能评估的装置
- 专利标题: Apparatus for implementing SRAM cell write performance evaluation
- 专利标题(中): 用于实现SRAM单元写入性能评估的装置
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申请号: US12351920申请日: 2009-01-12
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公开(公告)号: US07768851B2公开(公告)日: 2010-08-03
- 发明人: Chad Allen Adams , Derick Gardner Behrends , Travis Reynold Hebig , Daniel Mark Nelson
- 申请人: Chad Allen Adams , Derick Gardner Behrends , Travis Reynold Hebig , Daniel Mark Nelson
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 Joan Pennington
- 主分类号: G11C7/00
- IPC分类号: G11C7/00
摘要:
A SRAM cell write performance evaluation circuit includes a SRAM core where each wordline is connected to only one bit column. A ring oscillator circuit is used to generate wordline pulses. A state machine controls operations for the SRAM cell write performance evaluation circuit including the ring oscillator circuit and the SRAM core. A control signal is applied to the state machine to select a first write operation, where the circuit simultaneously writes all the cells to a known state with wide wordlines to ensure all cells are written. Then a second write operation is selected, and all the wordlines are launched simultaneously to write the cells to the opposite state. From these write operations, a required wordline pulse width to write the cell is identified.