发明授权
US07772076B2 Method of manufacturing semiconductor device using dummy gate wiring layer
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使用伪栅极布线层制造半导体器件的方法
- 专利标题: Method of manufacturing semiconductor device using dummy gate wiring layer
- 专利标题(中): 使用伪栅极布线层制造半导体器件的方法
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申请号: US11715965申请日: 2007-03-09
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公开(公告)号: US07772076B2公开(公告)日: 2010-08-10
- 发明人: Atsushi Yagishita , Kouji Matsuo , Yasushi Akasaka , Kyoichi Suguro , Yoshitaka Tsunashima
- 申请人: Atsushi Yagishita , Kouji Matsuo , Yasushi Akasaka , Kyoichi Suguro , Yoshitaka Tsunashima
- 申请人地址: JP Kawasaki-shi
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Kawasaki-shi
- 代理机构: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- 优先权: JP9-174195 19970630
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A method of manufacturing a semiconductor device includes forming a dummy gate wiring layer having a side surface and an upper surface on a first area of one major surface of a substrate, the major surface of the substrate including the first area and a second area, thereafter, forming a semiconductor film on the second area of the major surface of the substrate by using epitaxial growth, the semiconductor film having a thickness smaller than a thickness of the dummy gate wiring layer, and forming, on the semiconductor film, a gate sidewall which is made of an insulator and covers the side surface of the dummy gate wiring layer.
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