发明授权
US07781235B2 Chip-probing and bumping solutions for stacked dies having through-silicon vias
有权
具有通硅通孔的堆叠管芯的芯片探测和碰撞解决方案
- 专利标题: Chip-probing and bumping solutions for stacked dies having through-silicon vias
- 专利标题(中): 具有通硅通孔的堆叠管芯的芯片探测和碰撞解决方案
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申请号: US11644397申请日: 2006-12-21
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公开(公告)号: US07781235B2公开(公告)日: 2010-08-24
- 发明人: Wen-Liang Luo , Yung-Liang Kuo , Hsu Ming Cheng
- 申请人: Wen-Liang Luo , Yung-Liang Kuo , Hsu Ming Cheng
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: H01L21/66
- IPC分类号: H01L21/66
摘要:
A method of forming a semiconductor structure includes providing a stack structure having a first side and a second side opposite the first side. The stack structure includes a bottom wafer comprising a substrate; a plurality of through-silicon vias in the substrate; and a plurality of under bump metallurgies (UBMs) connected to the plurality of through-silicon vias, wherein the UBMs are on the first side of the stack structure. The method further includes attaching a handling wafer on the second side of the stack structure; performing a chip probing process; and removing the handling wafer from the stack structure.
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