发明授权
US07790541B2 Method and structure for forming multiple self-aligned gate stacks for logic devices
有权
用于形成用于逻辑器件的多个自对准栅极堆叠的方法和结构
- 专利标题: Method and structure for forming multiple self-aligned gate stacks for logic devices
- 专利标题(中): 用于形成用于逻辑器件的多个自对准栅极堆叠的方法和结构
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申请号: US11950095申请日: 2007-12-04
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公开(公告)号: US07790541B2公开(公告)日: 2010-09-07
- 发明人: Bruce B. Doris , Mahender Kumar , Werner A. Rausch , Robin Van Den Nieuwenhuizen
- 申请人: Bruce B. Doris , Mahender Kumar , Werner A. Rausch , Robin Van Den Nieuwenhuizen
- 申请人地址: US NY Armonk US CA Sunnyvale
- 专利权人: International Business Machines Corporation,Advanced Micro Devices, Inc. (AMD)
- 当前专利权人: International Business Machines Corporation,Advanced Micro Devices, Inc. (AMD)
- 当前专利权人地址: US NY Armonk US CA Sunnyvale
- 代理机构: Cantor Colburn LLP
- 代理商 Daniel Schnurmann
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L21/336 ; H01L21/76
摘要:
A method for forming multiple self-aligned gate stacks, the method comprising, forming a first group of gate stack layers on a first portion of a substrate, forming a second group of gate stack layers on a second portion of the substrate adjacent to the first portion of the substrate, etching to form a trench disposed between the first portion and the second portion of the substrate, and filling the trench with an insulating material.