Invention Grant
- Patent Title: Minimizing changes in common mode voltage at inputs of an operational amplifier used in a switched capacitor differential amplifier
- Patent Title (中): 最小化开关电容差分放大器中使用的运算放大器输入端的共模电压变化
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Application No.: US12177170Application Date: 2008-07-22
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Publication No.: US07795958B2Publication Date: 2010-09-14
- Inventor: Nitin Agarwal , Saurabh Singh
- Applicant: Nitin Agarwal , Saurabh Singh
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03F1/02
- IPC: H03F1/02

Abstract:
A reference generation circuit provided according to an aspect of the present invention generates a reference potential at different levels in the hold phase of different cycles in an input path of a switched capacitor differential amplifier. In an embodiment, for each hold phase, the reference generator provides the reference potential with a magnitude that tracks the magnitude of the input signal applied in a corresponding (preceding) sample phase. In case of a single-ended output, the reference potential generated for each hold phase equals the magnitude of one of the inputs on the differential input path. As a result, the common mode voltage at the input terminals of an operational amplifier contained in the switched capacitor differential amplifier is maintained at a desired level.
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