发明授权
- 专利标题: Multiple address and arithmetic bit-mode data processing device and methods thereof
- 专利标题(中): 多地址和算术位模式数据处理装置及其方法
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申请号: US11679590申请日: 2007-02-27
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公开(公告)号: US07805581B2公开(公告)日: 2010-09-28
- 发明人: Michael D. Snyder , David C. Holloway , Trinh H. Nguyen , Sergio Schuler , Gary L. Whisenhunt
- 申请人: Michael D. Snyder , David C. Holloway , Trinh H. Nguyen , Sergio Schuler , Gary L. Whisenhunt
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 主分类号: G06F12/00
- IPC分类号: G06F12/00
摘要:
A data processing device and methods thereof are disclosed. The data processing device can operate in three different modes. In a first, N-bit mode, the data processing device performs memory accesses based on N-bit values and performs arithmetic operations using N-bit values. In a second, hybrid N-bit/M-bit mode, the data processing device performs memory accesses based on M-bit values, where M is less than N, and performs arithmetic operations using N-bit values. In a third, M-bit mode, the data processing device performs memory accesses based on M-bit values and performs arithmetic operations using M-bit values. The three modes provide for compatibility with a wide range of applications. Further operation in the M-bit mode can provide a power savings when implementing applications compatible with that mode.
公开/授权文献
- US20080209182A1 MULTI-MODE DATA PROCESSING DEVICE AND METHODS THEREOF 公开/授权日:2008-08-28