发明授权
- 专利标题: Parallel test fixture for mixed signal integrated circuits
- 专利标题(中): 混合信号集成电路并联测试夹具
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申请号: US12144529申请日: 2008-06-23
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公开(公告)号: US07821277B2公开(公告)日: 2010-10-26
- 发明人: Cheng-Chin Ni
- 申请人: Cheng-Chin Ni
- 申请人地址: TW Hsin-Chu
- 专利权人: King Yuan Electronics Co., Ltd.
- 当前专利权人: King Yuan Electronics Co., Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Squire, Sanders & Dempsey, L.L.P.
- 优先权: TW97114234A 20080418
- 主分类号: G01R31/02
- IPC分类号: G01R31/02
摘要:
The present invention provides a parallel test fixture for mixed signal integrated circuits (ICs). The fixture includes a multi-layer printed circuit board (PCB). The fixture includes: a test area, which is disposed on a central area of the multi-layer PCB and includes several test regions for a plurality of mixed signal ICs; an analog signal ground layer, which is operationally connected with the analog signals of the mixed signal ICs in the test area; and a digital signal ground layer, which is operationally connected with the digital signals of the mixed signal ICs in the test area. Thereby, when a plurality of mixed signal ICs are parallel tested, not only the problem due to cross-talk could be solved but also the numbers of the layers of the multi-layer PCB could be reduced effectively.
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