公开(公告)号：US07821277B2

公开(公告)日：2010-10-26

申请号：US12144529

申请日：2008-06-23

申请人： Cheng-Chin Ni

发明人： Cheng-Chin Ni

IPC分类号： G01R31/02

CPC分类号： G01R1/07307 ,  G01R1/06772 ,  G01R31/3167

摘要： The present invention provides a parallel test fixture for mixed signal integrated circuits (ICs). The fixture includes a multi-layer printed circuit board (PCB). The fixture includes: a test area, which is disposed on a central area of the multi-layer PCB and includes several test regions for a plurality of mixed signal ICs; an analog signal ground layer, which is operationally connected with the analog signals of the mixed signal ICs in the test area; and a digital signal ground layer, which is operationally connected with the digital signals of the mixed signal ICs in the test area. Thereby, when a plurality of mixed signal ICs are parallel tested, not only the problem due to cross-talk could be solved but also the numbers of the layers of the multi-layer PCB could be reduced effectively.

摘要翻译： 本发明提供了一种用于混合信号集成电路（IC）的并联测试夹具。 该夹具包括多层印刷电路板（PCB）。 夹具包括：测试区域，其设置在多层PCB的中心区域上，并且包括用于多个混合信号IC的若干测试区域; 模拟信号接地层，其与测试区域中的混合信号IC的模拟信号可操作地连接; 以及与测试区域中的混合信号IC的数字信号可操作地连接的数字信号接地层。 因此，当多个混合信号IC被并联测试时，不仅可以解决串扰问题，而且可以有效地降低多层PCB的层数。

公开(公告)号：US07786744B2

公开(公告)日：2010-08-31

申请号：US12338037

申请日：2008-12-18

申请人： Cheng-Chin Ni ,  Kun-Chou Chen

发明人： Cheng-Chin Ni ,  Kun-Chou Chen

IPC分类号： G01R31/02

CPC分类号： G01R1/06761 ,  G01R1/0675 ,  G01R1/07342

摘要： Discloses are a probe card assembly and test probes used therein. The probe card assembly includes a main body, a probe base disposed in a central portion of the main body and a plurality of test probes connected between the probe base and the main body. Each of the test probes has a tip extending from the probe base for contacting a wafer under test. The test probes include at least one power probe, at least one signal probe and a plurality of ground probes. Each of the test probes has a middle section interposed between the main body and the probe base. Each of the test probes except the ground probes has a naked middle section coated with an insulating film but not sheltered by an insulating sleeve.

摘要翻译： 公开了在其中使用的探针卡组件和测试探针。 探针卡组件包括主体，设置在主体的中心部分的探针基座和连接在探针基座与主体之间的多个测试探针。 每个测试探针具有从探针基部延伸的尖端，用于接触待测晶片。 测试探针包括至少一个功率探测器，至少一个信号探针和多个接地探针。 每个测试探针具有介于主体和探针基座之间的中间部分。 除了接地探针之外的每个测试探针具有涂覆有绝缘膜但不被绝缘套管遮蔽的裸露的中间部分。

公开(公告)号：US07710134B2

公开(公告)日：2010-05-04

申请号：US12199843

申请日：2008-08-28

申请人： Cheng-Chin Ni

发明人： Cheng-Chin Ni

IPC分类号： G01R31/02

CPC分类号： G01R1/07342 ,  G01R1/0491 ,  G01R1/06772

摘要： Disclosed is a probe card assembly including a main body, a probe base provided at a center of the main body, and a plurality of test probes connecting the main body and the probe base. Therein, each of the test probes has a tip extending out from the probe base for contacting and testing a wafer. The test probes include at least one power probe, at least one grounding probe and a plurality of signal probes, wherein each of the test probes has a middle section between the main body and the probe base. Each of the power probe and the signal probes further contains therein a core that is wrapped by an insulation layer.

摘要翻译： 公开了一种探针卡组件，其包括主体，设置在主体中心的探针基座和连接主体和探针基座的多个测试探针。 其中，每个测试探针具有从探针基座延伸出来的用于接触和测试晶片的尖端。 测试探针包括至少一个功率探测器，至少一个接地探针和多个信号探针，其中每个测试探针在主体和探针基座之间具有中间部分。 功率探头和信号探头中的每一个还包含被绝缘层包裹的芯。

公开(公告)号：US07772861B2

公开(公告)日：2010-08-10

申请号：US12259249

申请日：2008-10-27

申请人： Cheng-Chin Ni

发明人： Cheng-Chin Ni

IPC分类号： G01R31/02

CPC分类号： G01R1/07342 ,  G01R1/06716 ,  G01R1/06772

摘要： The present invention discloses a probe card for testing a wafer. The probe card comprises a printed circuit board for transmitting test signals, a fastened ring arranged at the downside of the printed circuit board, and a plurality of needles passing through the fastened ring, each needle having one end connecting to circuits of the printed circuit board, and having a tip portion at the other end connecting to a pad of the wafer, where each needle has at least one bent portion between the fastened ring and the tip portion, to absorb stress between the needle and the pad.

摘要翻译： 本发明公开了一种用于测试晶片的探针卡。 探针卡包括用于传输测试信号的印刷电路板，布置在印刷电路板的下侧的紧固环和穿过紧固环的多根针，每个针的一端连接到印刷电路板的电路 并且在另一端具有连接到晶片的焊盘的尖端部分，其中每个针在紧固环和尖端部分之间具有至少一个弯曲部分，以吸收针和衬垫之间的应力。

公开(公告)号：US20090243643A1

公开(公告)日：2009-10-01

申请号：US12478774

申请日：2009-06-05

申请人： Cheng-Chin Ni

发明人： Cheng-Chin Ni

IPC分类号： G01R31/02

CPC分类号： G01R31/2806

摘要： A testing system module for testing printed circuit board (PCB) includes at least one robot having a pogo pin for moving to a testing point of the PCB; a pressure detecting unit for detecting a current pressure value on the printed circuit board; and a control system for keeping the pogo pin to contact with the PCB with constant pressure.

摘要翻译： 用于测试印刷电路板（PCB）的测试系统模块包括至少一个具有用于移动到PCB测试点的弹簧针的机器人; 压力检测单元，用于检测印刷电路板上的当前压力值; 以及用于保持弹簧针与恒定压力的PCB接触的控制系统。

公开(公告)号：US08248090B2

公开(公告)日：2012-08-21

申请号：US12413553

申请日：2009-03-28

申请人： Cheng-Chin Ni ,  Pei-Luen Hsu

发明人： Cheng-Chin Ni ,  Pei-Luen Hsu

IPC分类号： G01R31/00

CPC分类号： G01R1/0416 ,  H01R2201/20

摘要： A ZIF connector and a semiconductor testing device using the ZIF connectors are provided. The ZIF connector comprises a body portion and a clamping portion. The body portion is a print circuit board provided with circuit patterns, and further comprises a plurality of signal holes disposed on an upper part of the body portion for electrically connecting a plurality of corresponding signal cables, and a plurality of electrical terminals disposed on a lower part of the body portion and arranged on two lateral sides of the body portion for electrically connecting a plurality of corresponding electrical pads of a substrate. The circuit patterns are provided in the body portion to connect to the electrical terminals through the signal holes accordingly. The clamping portion is horizontally extended on one lateral side of the body portion for securing the ZIF connector in a connector board.

摘要翻译： 提供ZIF连接器和使用ZIF连接器的半导体测试装置。 ZIF连接器包括主体部分和夹紧部分。 主体部分是设置有电路图案的印刷电路板，并且还包括多个信号孔，其设置在主体部分的上部，用于电连接多个相应的信号电缆，以及设置在下部的多个电端子 主体部分的一部分并且布置在主体部分的两个侧面上，用于电连接衬底的多个对应的电焊盘。 电路图案设置在主体部分中，以通过信号孔相应地连接到电气端子。 夹持部分在主体部分的一个侧面上水平延伸，用于将ZIF连接器固定在连接器板中。

公开(公告)号：US08030944B2

公开(公告)日：2011-10-04

申请号：US12143557

申请日：2008-06-20

申请人： Cheng-Chin Ni

发明人： Cheng-Chin Ni

IPC分类号： G01R31/02 ,  G01R31/28

CPC分类号： G01R31/2853 ,  G01R31/026

摘要： The present invention provides a method for continuity test of integrated circuit. By using both pins of integrated circuit to measure a current of an electrostatic discharge device, the contact resistance of the integrated circuit can be obtained by calculating. The method comprises the steps: First, a DUT (device under test) is provided, and the DUT includes a second pin and the second pin connecting zero reference potential. Then, a voltage is applied to a first pin of DUT. Finally, the current through said first pin and said second pin would be measured. Therefore, the testing result of the DUT could be more precise and the quality of the DUT would be made sure.

摘要翻译： 本发明提供一种集成电路的连续性测试方法。 通过使用集成电路的两个引脚来测量静电放电装置的电流，可以通过计算获得集成电路的接触电阻。 该方法包括以下步骤：首先，提供DUT（待测设备），DUT包括第二引脚，第二引脚连接零参考电位。 然后，将电压施加到DUT的第一引脚。 最后，将测量通过所述第一引脚和所述第二引脚的电流。 因此，DUT的测试结果可能更精确，并且可以确保DUT的质量。

公开(公告)号：US20090251165A1

公开(公告)日：2009-10-08

申请号：US12143557

申请日：2008-06-20

申请人： Cheng-Chin Ni

发明人： Cheng-Chin Ni

IPC分类号： G01R31/26

CPC分类号： G01R31/2853 ,  G01R31/026

摘要： The present invention provides a method for continuity test of integrated circuit. By using both pins of integrated circuit to measure a current of an electrostatic discharge device, the contact resistance of the integrated circuit can be obtained by calculating. The method comprises the steps: First, a DUT (device under test) is provided, and the DUT includes a second pin and the second pin connecting zero reference potential. Then, a voltage is applied to a first pin of DUT. Finally, the current through said first pin and said second pin would be measured. Therefore, the testing result of the DUT could be more precise and the quality of the DUT would be made sure.

摘要翻译： 本发明提供一种集成电路的连续性测试方法。 通过使用集成电路的两个引脚来测量静电放电装置的电流，可以通过计算获得集成电路的接触电阻。 该方法包括以下步骤：首先，提供DUT（待测设备），DUT包括第二引脚，第二引脚连接零参考电位。 然后，将电压施加到DUT的第一引脚。 最后，将测量通过所述第一引脚和所述第二引脚的电流。 因此，DUT的测试结果可能更精确，并且可以确保DUT的质量。

公开(公告)号：US08008938B2

公开(公告)日：2011-08-30

申请号：US12478774

申请日：2009-06-05

申请人： Cheng-Chin Ni

发明人： Cheng-Chin Ni

IPC分类号： G01R31/20

CPC分类号： G01R31/2806

摘要： A testing system module for testing printed circuit board (PCB) includes at least one robot having a pogo pin for moving to a testing point of the PCB; a pressure detecting unit for detecting a current pressure value on the printed circuit board; and a control system for keeping the pogo pin to contact with the PCB with constant pressure.

摘要翻译： 用于测试印刷电路板（PCB）的测试系统模块包括至少一个具有用于移动到PCB测试点的弹簧针的机器人; 压力检测单元，用于检测印刷电路板上的当前压力值; 以及用于保持弹簧销以恒定压力与PCB接触的控制系统。

公开(公告)号：US07804315B2

公开(公告)日：2010-09-28

申请号：US12453257

申请日：2009-05-05

申请人： Cheng-Chin Ni ,  Kun Chou Chen

发明人： Cheng-Chin Ni ,  Kun Chou Chen

IPC分类号： G01R31/02

CPC分类号： G01R1/07342 ,  G01R1/06772

摘要： A probe card is disclosed, which has a conductive layer additionally provided on an insulating seat of a probe stand and the conductive layer is electrically connected to a ground circuit on the probe card via a conductive pin being fed through the insulating seat. A conductive wire is wound surrounding the intermediate segment of the probe, one end of the conductive wire is electrically connected to the ground circuit of the circuit board, and the other end of the conductive wire is electrically connected to the conductive layer of the probe stand. Thus, due to that an additional ground portion of the conductive layer is provided on the conductive wire wound surrounding the probe, a loop inductance of the probe in the insulating seat can be reduced such that accuracy of test data of the probe can be enhanced.

摘要翻译： 公开了一种探针卡，其具有另外设置在探针支架的绝缘座上的导电层，并且导电层经由穿过绝缘座的导电针电连接到探针卡上的接地电路。 缠绕在探针的中间部分的导线，导电线的一端电连接到电路板的接地电路，导电线的另一端电连接到探头支架的导电层 。 因此，由于在围绕探针的导电线上设置有导电层的附加接地部分，所以可以减小绝缘座中的探针的环路电感，从而能够提高探针测试数据的精度。