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US07839717B2 Semiconductor device with reduced standby failures 有权
具有减少待机故障的半导体器件

Semiconductor device with reduced standby failures
摘要:
A semiconductor memory device includes a cell core storing data, a plurality of peripheral circuit components, collectively driving data to/from the cell core and providing a default state at an output signal state during an initialization process upon power-up, and an initialization circuit detecting a standby mode of operation for the semiconductor memory device, and upon detecting the standby mode controlling operation of the plurality of peripheral circuit components to provide the default state as the signal state during standby mode.
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