Invention Grant
- Patent Title: Channel strain engineering in field-effect-transistor
- Patent Title (中): 场效应晶体管中的通道应变工程
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Application No.: US11760056Application Date: 2007-06-08
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Publication No.: US07842592B2Publication Date: 2010-11-30
- Inventor: Thomas Dyer , Rajendran Krishnasamy , Jin-Ping Han , Ernst Demm
- Applicant: Thomas Dyer , Rajendran Krishnasamy , Jin-Ping Han , Ernst Demm
- Applicant Address: US NY Armonk DE Munich
- Assignee: International Business Machines Corporation,Infineon Technologies AG
- Current Assignee: International Business Machines Corporation,Infineon Technologies AG
- Current Assignee Address: US NY Armonk DE Munich
- Agent Yuanmin Cai
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/4763

Abstract:
There is disclosed a method of applying stress to a channel region underneath a gate of a field-effect-transistor, which includes the gate, a source region, and a drain region. The method includes steps of embedding stressors in the source and drain regions of the FET; forming a stress liner covering the gate and the source and drain regions; removing a portion of the stress liner, the portion of the stress liner being located on top of the gate of the FET; removing at least a substantial portion of the gate of a first gate material and thus creating an opening therein; and filling the opening with a second gate material.
Public/Granted literature
- US20080305621A1 CHANNEL STRAIN ENGINEERING IN FIELD-EFFECT-TRANSISTOR Public/Granted day:2008-12-11
Information query
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