发明授权
- 专利标题： Methods and apparatuses for external test methodology and initialization of input-output circuits
- 专利标题（中）： 外部测试方法和输入输出电路初始化的方法和装置
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申请号： US11520530申请日： 2006-09-12
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公开(公告)号： US07856581B1公开(公告)日： 2010-12-21
- 发明人: Sassan Tabatabaei , Yervant Zorian
- 申请人： Sassan Tabatabaei , Yervant Zorian
- 申请人地址： US CA Moutain View
- 专利权人： Synopsys, Inc.
- 当前专利权人： Synopsys, Inc.
- 当前专利权人地址： US CA Moutain View
- 代理机构： Rutan & Tucker, LLP.
- 主分类号： G01R31/28
- IPC分类号： G01R31/28
摘要：
Various methods and apparatuses are described for a system that includes some on-chip components, e.g., I-Os, test processors, soft wrappers, etc., an external testing unit that provides Parametric Measurement Unit (PMU) capability, and various tests performed on the I-Os by the on-chip testing logic, the test vector patterns supplied by the external testing unit.
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