发明授权
US07859918B1 Method and apparatus for trimming die-to-die variation of an on-chip generated voltage reference 有权
用于修整片上产生的参考电压的芯片到芯片的变化的方法和装置

  • 专利标题: Method and apparatus for trimming die-to-die variation of an on-chip generated voltage reference
  • 专利标题(中): 用于修整片上产生的参考电压的芯片到芯片的变化的方法和装置
  • 申请号: US12577502
    申请日: 2009-10-12
  • 公开(公告)号: US07859918B1
    公开(公告)日: 2010-12-28
  • 发明人: Leon L. NguyenMartin L. Voogel
  • 申请人: Leon L. NguyenMartin L. Voogel
  • 申请人地址: US CA San Jose
  • 专利权人: Xilinx, Inc.
  • 当前专利权人: Xilinx, Inc.
  • 当前专利权人地址: US CA San Jose
  • 代理商 Michael T. Wallace
  • 主分类号: G11C7/00
  • IPC分类号: G11C7/00
Method and apparatus for trimming die-to-die variation of an on-chip generated voltage reference
摘要:
A method and apparatus is provided for the implementation of a measurement and adjustment mechanism within a semiconductor die that facilitates adjustment of the magnitude of voltage generated by one or more voltage reference generation circuits on the die. In a first embodiment, the output voltage magnitude of a bandgap reference circuit may be measured and adjusted. In a second embodiment, the output voltage magnitude of a voltage regulator circuit may be measured and adjusted. Programmable circuit elements, such as programmable resistors, may first be programmed during a configuration event of the die to determine the optimal configuration settings of the one or more voltage reference generation circuits. The optimal configuration settings are then used to program the state of one or more eFuses to maintain the optimal configuration settings for the duration of the semiconductor die's lifetime.
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