In a method and apparatus associated with a bus controller, a set of mechanisms are selectively added to the bus controller, as well as to slave devices connected to the bus controller. A mechanism is also added to one or more master devices connected to the bus controller, in order to provide the master devices with a transaction ordering capability. The added mechanisms collectively achieve the objective of supporting connection of multiple slave devices to a common controller interface, and at the same time allowing pipelined operation of the slave devices. One embodiment of the invention is directed to a method for use with a bus and an associated bus controller, wherein the bus controller has respective master and slave interfaces for use in selectively interconnecting master devices and slave devices. The method comprises the steps of connecting one or more of the master devices to one of the master interfaces, and connecting each of a plurality of slave devices to the same one of the slave interfaces. The method further comprises operating a connected master device to send multiple commands to a selected one of the connected slave devices in accordance with a command pipelining procedure.